Jun. 22 at 8:21 PM
Latest leak around
$GOOGL TPU v9 (reportedly with MediaTek on design) is bringing attention back to the real bottleneck layer in AI infrastructure.
While everyone debates GPU vs TPU winners like
$NVDA vs
$GOOGL, the under-discussed angle is what happens after the chip is built-cluster scaling.
That’s where
$SMTC starts to matter.
Every next-gen TPU or GPU rollout requires massive interconnect density: rack-to-rack, XPU-to-XPU, high-speed data transfer across thousands of accelerators. Semtech’s CopperEdge solutions sit directly in that layer, targeting up to ~90% lower power versus DSP-based alternatives.
They’ve already demonstrated 1.6T copper links into next-gen interfaces and previewed 3.2T speeds at OFC-pushing into leading-edge interconnect performance territory.
The key thesis:
$SMTC doesn’t need to pick winners in the accelerator race. Whether it’s
$NVDA GPUs or
$GOOGL TPUs, scaling AI clusters forces demand for high-speed interconnect.
